In a high frequency and high power semiconductor device (FET) using compound semiconductor, such as GaN, since high voltage is applied to a drain electrode, electric field concentrations occur in a corner of a gate electrode, and therefore a semiconductor element may be collapsed.
Conventionally, technology of alleviating the electric field concentrations in the gate electrode and preventing collapse of the semiconductor element is known, by providing a field plate as the fourth electrode on an insulating layer between a gate electrode and a source electrode, and electrically connecting the field plate to the source electrode.
FIG. 11 is a sectional view showing an example of a semiconductor device, which provides such the field plate electrode. As the semiconductor device is shown in the figure, a GaN layer 48 and an AlGaN (gallium aluminum nitride) layer 49 is epitaxially grown on a semi insulating SiC (carbonization silicon) 47; and a gate electrode 50 which is a Schottky electrode, and a source electrode 51 and a drain electrode 52 which are ohmic electrodes are formed on the surface of the AlGaN layer 49. The gate electrode 50, the source electrode 51, and the drain electrode 52 of each other are disposed in parallel. The surface of the AlGaN layer 49 including these electrodes is covered with an insulating film 54. On the insulating film 54, a field plate electrode 55 is provided between the gate electrode 50 and the drain electrode 52.
Similarly the field plate electrode 55 is formed by a conductor of stripe shape, and is disposed in parallel with the gate electrode 50 and the drain electrode 52. The field plate electrode 55 is used in parallel to the gate electrode 50 or the part is used by overlapping in that width direction although not illustrated, and is connected to the source electrode 51 by wiring members, such as a wire, and is held at the same potential as the source electrode 51.
With the field plate electrode 55, electric field concentrations induced in an edge part 56 of the gate electrode 50 by high drain voltage are alleviated. Accordingly, as for breakdown voltage of the FET improving by the field plate electrode 55 and a current collapse phenomenon being suppressed, inventions described in Patent Document 1 and Patent Document 2 is known, for example.    Patent Document 1: Japanese Patent Application Laid-Open No. H09-205211,    Patent Document 2: Japanese Patent Application Laid-Open No. 2002-231733.
However, parasitic capacitance is induced in the gate electrode 50 by disposing the field plate electrode 55 near the gate electrode 50. Moreover, as for a part, which the gate electrode 50 and the field plate electrode 55 overlap, the parasitic capacitance becomes large, and the amplifying characteristic of FET in a high frequency region deteriorates. That is, a gain of FET reduces by the parasitic capacitance. And, reduction of the gain is so large that film thickness of the insulating film 54 under the field plate electrode 55 is thin.
Thus, prevention of current collapse of FET by the field plate electrode, which is the fourth electrode, or improvement in breakdown voltage and amplifying gain of FET has a relation of a trade-off mutually.